NXP Semiconductors /LPC11D14 /GPIO0 /DATA

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Interpret as DATA

Description

Port n data register for pins PIOn_0 to PIOn_11

Fields

DATA0	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA1	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA2	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA3	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA4	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA5	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA6	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA7	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA8	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA9	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA10	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
DATA11	Logic levels for pins PIOn_0 to PIOn_11. HIGH = 1, LOW = 0.
RESERVED	Reserved

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